lambda advanced analog inc. l l ahe281xd series dual output, hybrid - high reliability dc/dc converter description features the ahe series of dc/dc converters feature high power density and an extended temperature range for use in military and industrial applications. designed to mil-std-704 input requirements, these devices have nominal 28vdc inputs with 12v and 15v dual outputs to satisfy a wide range of requirements. the circuit design incorporates a pulse width modulated push-pull topology operating in the feed-forward mode at a nominal switching frequency of 250khz. input to output isolation is achieved through the use of transformers in the forward and feedback circuits. the advanced feedback design provides fast loop response for superior line and load transient characteristics and offers greater reliability and radiation tolerance than devices incorporating optical feedback circuits. manufactured in a facility fully qualified to mil-prf- 38534, these converters are available in four screening grades to satisfy a wide range of requirements. the ch grade is fully compliant to the requirements of mil-prf-38534 for class h. the hb grade is processed and screened to the class h requirement, but may not necessarily meet all of the other mil-prf-38534 requirements, e.g., element evaluation and periodic inspection (p.i.) not required. both grades are tested to meet the complete group "a" test specification over the full military temperature range without output power deration. two grades with more limited screening are also available for use in less demanding applications. variations in electrical, mechanical and screening can be accommodated. contact lambda advanced analog for special requirements. n n 17 to 40 volt input range (28vdc nominal) n n 12 an d 15 volt outputs available n n indefinite short circuit and overload protection n n 12.9w/in 3 power density n n 15 watts output power n n fast loop response for superior transient characteristics n n operating temperature range from -55c to +125c available n n popular industry standard pin-out n n resistance seam welded case for superior long term hermeticity n n efficiencies up to 82% n n shutdown from external signal n n military screening n n 314,000 hour mtbf at 85c, auc
2 specifications ahe2812d absolute maximum ratings input voltage -0.5v to 50v soldering temperature 300c for 10 seconds case temperature operating -55c to +125c storage -65c to +135c table i. electrical performance characteristics test symbol conditions -55 c t c +125 c v in = 28 v dc 5%, c l = 0 unless otherwise specified group a subgroups device types limits unit min max output voltage v out i out = 0 1 all 11.88 12.12 v 2,3 11.76 12.24 output current 9 / 11 / i out v in = 17, 28, and 40 v dc 1,2,3 all 0.0 625 ma output ripple voltage 8 / 9 / v rip v in = 17, 28, and 40 v dc b.w. = dc to 2 mhz 1,2,3 all 60 mv p-p output power 4 / 9 / 11 / p out v in = 17, 28, and 40 v dc 1,2,3 all 15 w line 9 / regulation 10 / vr line v in = 17, 28, and 40 v dc i out = 0, 313, and 625 ma 1 all 30 mv 2,3 60 load regulation 9 / vr load v in = 17, 28, and 40 v dc i out = 0, 313, and 625 ma 1,2,3 all 120 mv input current i in i out = 0, inhibit (pin 2) tied to input return (pin 10) 1,2,3 all 18 ma i out = 0, inhibit (pin 2) = open 40 input ripple current 8 / i rip i out = 625 ma b.w. = dc to 2 mhz 1,2,3 all 50 ma p-p efficiency e ff i out = 625 ma, t c = +25 c 1 all 80 % isolation iso input to output or any pin to case (except pin 8) at 500 v dc, t c = +25 c 1 all 100 m w capacitive load 6 / 12 / c l no effect on dc performance, t c = +25 c 4 all 200 f power dissipation load fault p d overload, t c = +25 c 3 / 1 all 6 w short circuit, t c = +25 c 6 see footnotes at end of table
3 ahe2812d table i. electrical performance characteristics - continued test symbol conditions -55 c t c +125 c v in = 28 v dc 5%, c l = 0 unless otherwise specified group a subgroups device type limits unit min max switching 9 / frequency f s i out = 625 ma 4,5,6 01 225 275 khz 02 225 245 03 250 275 output response to step transient load changes 7 / vo tload 50 percent load to/from 100 percent load 4 all -300 +300 mv pk 5,6 -450 +450 no load to/from 50 percent load 4 all -500 +500 5,6 -750 +750 recovery time step transient load changes 1 / 7 / tt load 50 percent load to/from 100 percent load 4 all 70 s 5,6 100 no load to 50 percent load 4,5,6 all 1500 50 percent load to no load 4,5,6 all 5 ms output response to transient step line changes 5 / 12 / vo tline input step 17 to 40 v dc 4,5,6 all 1200 mv pk input step 40 to 17 v dc 4,5,6 all -1500 recovery time transient step line changes 1 / 5 / 12 / tt line input step 17 to 40 v dc 4,5,6 all 4 ms input step 40 to 17 v dc 4,5,6 all 4 turn on overshoot 9 / vton os i out = 0 and 625 ma 4,5,6 all 600 mv pk turn on delay 2 / 9 / ton d i out = 0 and 625 ma 4,5,6 all 10 ms load fault recovery 12 / tr lf 4,5,6 all 10 ms notes: 1 / recovery time is measured from the initiation of the transient to where v out has returned to within 1 percent of v out at 50 percent load. 2 / turn on delay time measurement is for either a step application of power at the input or the removal of a ground signal from the inhibit pin (pin 2) while power is applied to the input. 3 / an overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 4 / total power at both outputs. for operation at 16 v dc input, derate output power by 33 percent. 5 / input step transition time between 2 and 10 microseconds. 6 / capacitive load may be any value from 0 to the maximum limit without compromising dc performance. a capacitive load in excess of the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn on. 7 / load step transition time between 2 and 10 microseconds. 8 / bandwidth guaranteed by design. tested for 20 khz to 2 mhz. 9 / tested at each output. 10 / when operating with unbalanced loads, at least 25 percent of the load must be on the positive output to maintain regulation. 11 / parameter guaranteed by line and load regulation tests. 12 / parameter shall be tested as part of design characterization and after design or process changes. thereafter parameters shall be guaranteed to the limits specified in table i.
4 specifications ah e2815d absolute maximum ratings input voltage -0.5v to 50v soldering temperature 300c for 10 seconds case temperature operating -55c to +125c storage -65c to +135c table ii. electrical performance characteristics test symbol conditions -55 c t c +125 c v in = 28 v dc 5%, c l = 0 unless otherwise specified group a subgroups device types limits unit min max output voltage v out i out = 0 1 all 14.85 15.15 v 2,3 14.70 15.30 output current 9 / 11 / i out v in = 17, 28, and 40 v dc 1,2,3 all 0.0 500 ma output ripple 8 / voltage 9 / v rip v in = 17, 28, and 40 v dc b.w. = dc to 2 mhz 1,2,3 all 60 mv p-p output power 4 / 9 / 11 / p out v in = 17, 28, and 40 v dc 1,2,3 all 15 w line 9 / regulation 10 / vr line v in = 17, 28, and 40 v dc i out = 0, 250, and 500 ma 1 all 35 mv 2,3 75 load regulation 9 / vr load v in = 17, 28, and 40 v dc i out = 0, 250, and 500 ma 1,2,3 all 150 mv input current i in i out = 0, inhibit (pin 2) tied to input return (pin 10) 1,2,3 all 18 ma i out = 0, inhibit (pin 2) = open 40 input ripple 8 / current i rip i out = 500 ma b.w. = dc to 2 mhz 1,2,3 all 50 ma p-p efficiency e ff i out = 500 ma, t c = +25 c 1 all 80 % isolation iso input to output or any pin to case (except pin 8) at 500 v dc, t c = +25 c 1 all 100 m w capacitive load 6 / 12 / c l no effect on dc performance, t c = +25 c 4 all 200 f power dissipation load fault p d overload, t c = +25 c 3 / 1 all 6 w
5 ahe2815d table ii. electrical performance characteristics - continued. test symbol conditions -55 c t c +125 c v in = 28 v dc 5%, c l = 0 unless otherwise specified group a subgroups device type limits unit min max switching 9 / frequency f s i out = 500 ma 4,5,6 01 225 275 khz 02 225 245 03 250 275 output response to step transient load changes 7 / vo tload 50 percent load to/from 100 percent load 4 all -300 +300 mv pk 5,6 -450 +450 no load to/from 50 percent load 4 all -500 +500 5,6 -750 +750 recovery time step transient load changes transient load changes 1 / 7 / tt load 50 percent load to/from 100 percent load 4 all 70 s 5,6 100 no load to 50 percent load 4,5,6 all 1500 50 percent load to no load 4,5,6 all 5 ms output response to transient step line changes 5 / 12 / vo tline input step 17 to 40 v dc 4,5,6 all 1500 mv pk input step 40 to 17 v dc 4,5,6 all -1500 recovery time transient step line changes 1 / 5 / 12 / tt line input step 17 to 40 v dc 4,5,6 all 4 ms input step 40 to 17 v dc 4,5,6 all 4 turn on overshoot 9 / vton os i out = 0 and 500 ma 4,5,6 all 600 mv pk turn on delay 2 / 9 / ton d i out = 0 and 500 ma 4,5,6 all 10 ms load fault recovery 12 / tr lf 4,5,6 all 10 ms notes: 1 / recovery time is measured from the initiation of the transient to where v out has returned to within 1 percent of v out at 50 percent load. 2 / turn on delay time measurement is for either a step application of power at the input or the removal of a ground signal from the inhibit pin (pin 2) while power is applied to the input. 3 / an overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 4 / total power at both outputs. for operation at 16 v dc input, derate output power by 33 percent. 5 / input step transition time between 2 and 10 microseconds. 6 / capacitive load may be any value from 0 to the maximum limit without compromising dc performance. a capacitive load in excess of the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn on. 7 / load step transition time between 2 and 10 microseconds. 8 / bandwidth guaranteed by design. tested for 20 khz to 2 mhz. 9 / tested at each output. 10 / when operating with unbalanced loads, at least 25 percent of the load must be on the positive output to maintain regulation. 11 / parameter guaranteed by line and load regulation tests. 12 / parameter shall be tested as part of design characterization and after design or process changes. thereafter parameters shall be guaranteed to the limits specified in table ii.
block diagram (single output) designer must assign one of the converters as the master. then, by definition, the remaining converters become slaves and will operate at the masters' switching frequency. the user should be a ware that the synchronozation system is fail-safe; that is, the slaves will continue operating should the ma st er fre qu en cy be interrupted for any reason. the layout must be such that the synchronozation out put ( pin 9 ) of th e ma ste r de vi ce is connected to the sy nc h r on o za tion input (pin 9) of each slave de vi ce . i t is advisable to keep this run short to min imize the possibilty of radiating the 250khz sw i tch ing frequency. the appropriate parts must be ordered to utilize this feature. after selecting the converters required for the system, an mstr suffix is added for the master converter part number and an slv suffix is added for slave part number. application information inhibit function connecting the inhibit input (pin 2) to input common (pin 10) will cause the converter to shut down. it is recommended that the inhibit pin be driven by an open collector device capable of sinking at least 400a of current. the open circuit voltage of the inhibit input is 11.5 +1 v d c . emi filter an optional emi filter (afc461) will reduce the input ripple current to levels below the limits imposed by mil-std-461 ceo3. device synchronization whenever multiple dc/dc converters are utilized in a single system, significant low frequency noise may be generated due to slight difference in the switching frequencies of the converters (beat frequency noise). because of the low frequency nature of this noise (typically less than 10 k hz), it is difficult to filter out and may interfere with proper operation of sensitive systems (communi- cations, radar or telemetry). l am bda advanced ana log offers an option which provides synchroniza- tion of multiple ahe/atw converters, thus eliminat- ing this type of noise. to take advantage of this capability, the system input filter controller 1 2 9 10 output filter regulator & output filter error amp & ref 3 5 4 6
pin designation ahe2812d ahe2815d pin 1 positive input pin 1 0 inpu t common pin 2 inhibit input pin 9 n/ c o r sync. pin 3 positiv e output pin 8 cas e ground pin 4 outpu t common pin 7 n/c pin 5 negative output pin 6 n/c part number ahf 28 xx d x / x - xxx model synchronization option input voltage mstrmaster slvslave output voltage 12C12 v dc temperature range 15C15 v dc omit for -55c to +85c es -55c to +105c dua l output hb -55c to +125c package option fflange omit for standard 7 hb screening process per mil- prf-38534 test inspection method conditlon pre-seal internal visual 2017 stabilization bake 1008 c temperature cycling 1010 c constant acceleration 2001 a , y 1 direction bu r n-in 1015 t c = +125c final electrical test t c = -55,+25,+125c gross leak 1014 c fine leak 1014 a external visual 2009 es screening process same as hb screening except as follows: test inspection method constant acceleration 2001, 500gs b u r n-in 1015, 96hrs. final electrical 25 c only filter ahe2805s/es-mstr master ahe2815d/es-slv slave ahe2812s/es-slv slave 1 10 1 10 1 10 5 4 3 4 5 5 4 +5v comm +15v comm -15v +12v comm system bus typical synchronization connection diagram
mechanical outline pin 1 .090r max. .090r max. 1.120 max. (28.194) 0.040d x 0.260l (1.016) (6.604) 0.800 (20.320) 2.120 max. (53.594) 0.495 max. (12.573) 4 x 0.400 = 1.600 (10.160) (40.640) 2.880 max. (73.152) pin 1 1.110 (28.194) 2.550 ?010 (64.770) 0.800 (20.320) 2.120 max. (53.594) 0.495 max. (12.573) 4 x 0.400 = 1.600 (10.160) (40.640) 0.040d x 0.260l (1.016) (6.604) .090r max. 0.162d 2 places (4.115) input common n/c or synchronization case ground pos. input inhibit input pos. output output common neg. output 10 1 65 bottom view weight standard55 grams max. flange58 grams max. 8
mil-prf-38534 certified is o 900 1 r g s trd 2270 martin avenue santa clara ca 95050-2781 (408) 988-4930 fax (408) 988-2702 standardized military drawing cross reference standardized vendor vendor military drawing cage similar pin number pin 5962-9157501hxx 52467 ahe2815d/ch 5962-9157501hzx 52467 ahe2815df/ch 5962-9157502hxx 52467 ahe2815d/ch-slv 5962-9157502hzx 52467 ahe2815df/ch-slv 5962-9157503hxx 52467 ahe2815d/ch-mstr 5962-9157503hzx 52467 ahe2815df/ch-mstr standardized vendor vendor military drawing cage similar pin number pin 5962-9204001hxx 52467 ahe2812d/ch 5962-9204001hzx 52467 ahe2812df/ch 5962-9204002hxx 52467 ahe2812d/ch-slv 5962-9204002hzx 52467 ahe2812df/ch-slv 5962-9204003hxx 52467 ahe2812d/ch-mstr 5962-9204003hzx 52467 ahe2812df/ch-mstr 9 8 4 9 output power (watts) efficiency (%) output power (watts) efficiency (%) ? lambda advanced analog the information in this data sheet has been carefully checked and is believed to be accurate, however, no responsibility is assumed for possible errors. the specifications are subject to change without notice. ahe2815d efficiency ahe2812d efficiency
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